assembly - How come `0F 1A /r` and `0F 1B /r` have been NOP before Intel MPX? -
on processors don't support intel mpx documentation says mpx instructions nop. namely, i've looked through these instructions, appear 0f 1a /r
or 0f 1b /r
unprefixed or prefixed f3
, f2
or 66
bytes, depending on instruction. also, there statements bndmk
:
the reg-reg form of instruction retains legacy behavior (nop).
i've tried search these opcodes in pdf (namely search string 0f 1
), found there description of mpx instructions. looking in instruction set reference february 2014, i've found lots of instructions of form, not nops, e.g. f2 0f 12 /r
movddup
. , looking 0f 1a
, 0f 1b
failed find there.
looking nop found multibyte nop 0f 1f /0
, doesn't coincide mpx instructions form.
so question is, documented legacy behavior of 0f 1a /r
, 0f 1b /r
nop? general rule form of instructions, or maybe represent non-nop instruction in nop form (like 90
standing xchg eax,eax
)?
the intel pdfs have lying around indeed don't list nop
either, block 0f 19-1e
empty in opcode table a-3. two-byte opcode map: 08h -- 7fh (first byte 0fh). footnote says all blanks in opcode maps reserved , must not used. not depend on operation of undefined or reserved locations.
i have amd pdf 24594--rev. 3.19--september 2012, , list aforementioned block being nop
in opcode table a-4. secondary opcode map (two-byte opcodes), low nibble 8-fh. however, page actual nop
instruction lists 0f 1f
.
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